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Key takeaways
- Each CPU has its own memory channels; fill one DIMM per channel on every CPU before adding a second DIMM anywhere.
- Unbalanced population makes the controller interleave across fewer channels, which cuts bandwidth even when total capacity is the same.
- RDIMM, LRDIMM and UDIMM cannot be mixed in one server, and DDR4 modules do not fit DDR5 slots.
- Mixed speeds run at the slowest module, and two DIMMs per channel often lowers speed by an amount the OEM table states.
- A memory quote needs the server model, the installed module's part number from iDRAC or iLO, and the target capacity.
How do channels and slots map on a two-socket server?
A memory channel is a set of data and command lines from a CPU's memory controller to one or more DIMM slots. Each socket has its own controller and channels, so a module in a slot that belongs to CPU 2 is invisible if CPU 2 is not installed. The channel count depends on the CPU family: for example, six per socket on first and second generation Xeon Scalable, eight on fourth generation Xeon Scalable and DDR4 EPYC, and twelve on DDR5 EPYC 9004.
Slots are labeled by CPU and position. Dell uses A1 through A12 for CPU 1 and B1 through B12 for CPU 2 on many models; HPE numbers slots per processor. The label alone does not tell you the channel; only the OEM population table does. On a two-DIMM-per-channel (2DPC) board, one slot in each channel is primary, and the table lists the primary slots first.
Why does balanced population matter?
Balanced means the same number of identical modules on every channel of every CPU. The controller then interleaves across all channels. A DDR4 or DDR5 channel carries 64 data bits plus ECC, so at 3200 MT/s a channel delivers 25.6 GB/s and at 4800 MT/s it delivers 38.4 GB/s; a CPU's total bandwidth is that figure multiplied by the channels actually populated.
Unbalanced population, such as five modules on a six-channel CPU or all modules on one CPU, forces the controller to interleave across fewer channels or to split memory into a fast region and a slow region. The system boots and reports full capacity, but memory-bound workloads run slower. The rule: one module per channel on every CPU first, then a second per channel on every CPU, identical throughout.
How do ranks and two DIMMs per channel affect speed?
A rank is a group of DRAM chips on a module that the controller reads or writes as one 64-bit word; single, dual and quad-rank modules have one, two and four. Every controller supports a limited number of ranks and a limited electrical load per channel. Two quad-rank RDIMMs on one channel can exceed that on some platforms, which is why LRDIMMs buffer the data lines. The OEM table already accounts for rank limits.
A second module on a channel also adds load, and on many platforms the firmware drops the channel to a lower data rate. The step is platform-dependent: for example, a DDR5 server rated at 4800 MT/s with one DIMM per channel may run at 4400 MT/s with two, and DDR4 platforms that allowed three per channel dropped further at 3DPC. The OEM table states the speed for each configuration.
On an eight-channel CPU, sixteen 32 GB modules and eight 64 GB modules both give 512 GB, but with a 2DPC step-down only the eight larger modules run at full speed. Fewer larger modules at 1DPC is the faster layout and leaves slots free for later.
Which memory types cannot be mixed?
Three module types exist, and a platform accepts only one of them at a time.
| Type | What it is | Mixing rule |
|---|---|---|
| UDIMM | Unbuffered; used in workstations and some entry servers | Cannot be mixed with RDIMM or LRDIMM; many two-socket servers do not accept it |
| RDIMM | Registered; a register buffers the command and address lines | Cannot be mixed with LRDIMM in the same server |
| LRDIMM | Load-reduced; buffers the data lines as well, for high capacity | Cannot be mixed with RDIMM in the same server |
| DDR4 and DDR5 | Different generations with different key notch and voltage | Physically incompatible; a DDR4 module will not seat in a DDR5 slot |
ECC matters too: servers that require ECC will not run non-ECC modules. The spec decoder explains how to read RDIMM, LRDIMM, rank and speed from a module label.
Can you mix capacities, speeds and ranks?
Speeds: yes on most platforms, but every module runs at the slowest common speed, and population may drop it further. Capacities: most OEM guides allow them mixed when the layout stays symmetrical across CPUs; Dell guides usually put the higher-capacity or higher-rank module in the first slot of a channel. Ranks: avoid mixing rank counts within a channel unless the OEM table shows that combination.
DRAM organization (x4 or x8) is another label detail. Mixing them boots on most platforms, but some advanced error-correction features require x4 modules throughout. The safest upgrade is the same part number as the installed modules, or a full replacement set.
How is DDR5 population different from DDR4?
DDR5 puts a power management IC (PMIC) on the module, so the board no longer supplies the module's core voltage directly. It splits each module into two independent 32-bit subchannels, adds on-die ECC inside the DRAM (which is not a substitute for the side-band ECC servers rely on), and uses a different key notch, so DDR4 and DDR5 never interchange.
Population rules got stricter. Many DDR5 boards are designed for one module per channel only, especially twelve-channel EPYC boards, and boards that offer 2DPC usually publish a speed drop for it. Read the table before deciding how many modules to buy.
How do you read a Dell or HPE population guide?
Dell publishes memory population guidelines in each PowerEdge Installation and Service Manual. The guide has a slot diagram, a table of supported configurations by module count, and rules: which slots to fill first (many models mark the first slot of each channel with a white release lever), how to match across CPUs, and the resulting speed. Start with the table row that matches the number of modules you plan to install.
HPE publishes DIMM population rules per ProLiant generation and a memory configurator tool that produces a slot-by-slot layout for a target capacity. HPE servers identify HPE-branded modules; other modules generally run but may show a notice in iLO.
What should you send when requesting a memory quote?
Send the server model and generation, the part number of the installed modules (listed in the iDRAC or iLO memory inventory and printed on the label), how many are installed and in which slots, whether both CPUs are present, and the capacity you want to reach. With that, a quote can match type, speed, rank and organization to what is already in the box.
Memory Clearance sells new and refurbished server memory and quotes per part. Quotes are answered weekdays 8:00 am to 5:00 pm PST. The condition shown on a listing is the condition you receive; warranty terms are on the warranty page.
Frequently asked questions
Can I add a single DIMM to a server that already has eight?
You can, but it usually leaves the population unbalanced and part of the memory in a slower mode. Add modules in the multiples the OEM table lists, typically one per channel across both CPUs, using the same type, speed, rank and organization as the installed set.
Do I have to buy the same brand as the installed memory?
No. What has to match is the module type (RDIMM or LRDIMM), speed, rank count, organization (x4 or x8) and ECC. Different brands with the same specification work together on most platforms. The exception is OEM identification: HPE servers detect HPE-branded modules and may report a notice for others.
Why does the server report a lower speed than the module rating?
Three limits apply and the lowest wins: the CPU's rated memory speed, the slowest module in the system, and the population-dependent step-down when channels carry two modules. A 3200 MT/s module on a CPU rated for 2933 MT/s runs at 2933, and a 2DPC layout may drop it further.
What happens if only CPU 1's slots are populated?
The system boots, but every memory access from CPU 2 crosses the interconnect to CPU 1's memory, which adds latency and shares CPU 1's bandwidth. Total memory bandwidth is half of what a balanced layout gives. Split modules evenly across both CPUs, following the same slot order on each.